| Features |
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Various digital output module options LVDS (VG51A0001)
TMDS (VG51A0002)
GVIF, 2 sets of MX-U8-2PH connector (VG51A0D02)
GVIF, each 1 set of MX-U8-2PH and C2956-MX-U5-7PL-BS connector (VG51A0D03) |
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Complied many different timing and supported parallel RGB output, digital serial output format (TMDS/LVDS/GVIF) |
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Parallel output is consisted 8 bit in each RGB and complies 5 to 200 MHz (in SINGLE mode; 5to 100 MHz, in DUAL mode; 10 to 200 MHz) for dot clock. |
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Clock output of parallel output can adjust phases (clock delay function). |
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It is possible to switch the positive/negative polarity of the timing signals (HSYNC,VSYNC,Date Enable).
In addition, it is also possible to output the Date Enable (DE) signals at timing different from that of the actual data. |
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All output signal patterns can shift bits to make output level variable. |
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Provides marker display function, screen scroll function, character superposition, and flicker function. |